Regarding a semiconductor device including an electrically rewritable nonvolatile memory device such as flash memory, the time taken for programming (writing) tends to increase with an increase of the capacity of the nonvolatile memory device.
Japanese Patent Laying-Open No. 2006-351166 (PTD 1) discloses a technique for shorting this time taken for programming. Specifically, a flash memory device of this document includes a control logic, a high-voltage generator circuit, and a signal generator circuit. The control logic generates, during a program interval, a first flag signal for indicating that a program voltage is supplied to a word line. The high-voltage generator circuit generates the program voltage supplied to the word line, and generates, during the program interval, a second flag signal for indicating that the program voltage has been recovered to a target voltage. The signal generator circuit generates a program execution end signal in response to the first and second flag signals. When the program execution end signal is generated, the control logic deactivates the first flag signal so that the program interval is terminated.